Aim is to develop, model and characterise packaging and wiring solutions used in the 100-qubit solution of project phase 1, as well as demonstrate proof-of-concept solutions enabling packaging and wiring of 1,000-qubit QPUs during project phase 2.
WP lead: VTT
CHALMERS, FZJ, BAdW-WMI, QuantWare, AALTO, IQM, Bluefors, SUPRA