Involved work packages

WP 1: Quantum processor

The main objective is to organise the design and validation of the quantum processing units (QPUs) of OpenSuperQPlus. The project will deploy these QPUs in the system-integration platforms – at CHALMERS, TU Delft and WMI – within project phase 1 and will subsequently develop them toward the 1,000-qubit goal of project phase 2.

WP 2: Fabrication

Starting from state-of-the-art performance at smaller scale developed in the experimental quantum computing groups of the consortium (TU Delft, QuantWare, VTT, CHALMERS, WMI), we aim for increased coherence, yield and reproducibility, enabling higher gate fidelity and consequently larger circuit depth, on an equal footing with increased qubit number.

WP 3: Packaging and wiring

Aim is to develop, model and characterise packaging and wiring solutions used in the 100-qubit solution of project phase 1, as well as demonstrate proof-of-concept solutions enabling packaging and wiring of 1,000-qubit QPUs during project phase 2.

WP 4: Room-temperature electronics

We aim to develop room-temperature electronic (RTE) systems to support testing, ramp-up and operation of a large-scale QPU of 100 qubits with a sufficient number of control and readout channels and capability for real-time quantum error correction.


Involved partners

CHALMERS, FZJ, QuantWare, TU Delft, BAdW-WMI, AALTO, IQM, VTT, UPV/EHU, CSC, ISTA, CNRS, KIT, CEA, Alice & Bob, HUJI, FHG-EMFT, Bluefors, SUPRA, ZIGE, R&S, Qruise, OrangeQS

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